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Imagination Technologies announced its IMG DXS automotive GPU IP on September 11, 2024, positioning it as a scalable graphics-and-compute platform for digital cockpits, infotainment and ADAS. The company claimed up to 50% higher peak performance than its previous automotive GPU generation and introduced a distributed functional-safety approach intended to reduce the overhead of ASIL-B fault detection. A later announcement identified one independently certified configuration: the DXS-8-256. These are licensable GPU designs for integration into a customer’s chip—not a finished graphics card or a certified vehicle system.
What Imagination announced
IMG DXS is a family of automotive GPU intellectual property (IP) that semiconductor companies can license and integrate into system-on-chips (SoCs). Imagination announced it on September 11, 2024, for graphics and compute tasks in digital cockpits, infotainment, in-vehicle intelligence and advanced driver-assistance systems. The company said the IP had already been licensed for automotive use, but did not identify all licensees in its announcement. Imagination’s announcement
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That distinction matters to car buyers: DXS is not a product they can install or purchase as an aftermarket GPU. Its performance, power use and safety evidence in a vehicle depend on how a licensee configures and integrates the IP into an SoC and the surrounding system.
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What “highest performance” means
Imagination described DXS as its highest-performance automotive GPU at launch. The company claimed 1.5 times the peak performance of its previous automotive GPU generation, or a 50% increase. The announcement gave a single-core range of 0.25 to 1.5 TFLOPS and described multi-core configurations scaling to headline peaks of 192 GPixel/s, 6 TFLOPS and 24 TOPS. It also cited about 20% better performance efficiency from D-Series features such as Pipelined Data Masters and 2D Dual-Rate Texturing. These are company claims, not an independently verified ranking against all automotive GPUs. The announcement figures
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The units measure different kinds of theoretical throughput. GPixel/s describes pixel processing; TFLOPS describes floating-point operations; and TOPS describes integer or other operations, depending on the precision and counting method. They are not interchangeable measures of real vehicle performance. The headline multi-core peaks should not be compared with single-core figures, nor does a peak specify sustained throughput, latency, memory-bandwidth limits, power draw or thermal behavior. Imagination did not publish a complete, independently reproducible benchmark methodology with the announcement.
Actual results depend on the selected core count and clock, process node, memory system, interconnect, thermal and power limits, software stack, and workload. A stated peak is therefore a configuration-dependent ceiling, not a guarantee for a production vehicle.
Graphics plus compute
DXS is intended to do more than render displays. Imagination presents it as a compute resource for tasks including computer vision, driver monitoring, collision avoidance and preprocessing of ADAS sensor data from sources such as lidar and radar. The company added an FP16 pipeline and points to its imgBLAS, imgNN and imgFFT libraries. It says selected compute workloads can reach up to 10 times the previous generation’s performance and that the libraries can help developers achieve up to 80% GPU utilization. Those are workload-dependent company claims, not general guarantees for AI inference or every application. DXS product information
The software story includes OpenCL compute support and reference tooling for oneAPI and TVM, alongside graphics APIs. Current product information lists Vulkan 1.3, OpenGL 4.6 via Zink, OpenGL ES 3.x, 2.0 and 1.1 plus extensions, and OpenCL 3.0 FP. It also lists QNX, Linux and Android support. Availability can vary by configuration and customer software stack. The original announcement additionally discussed Green Hills Software’s INTEGRITY RTOS and safety-critical driver work with CoreAVI; that should not be read as a promise that every API, operating system or safety package is bundled with every implementation.
For an automaker or chip designer, driver maturity, compiler and profiling tools, library coverage, long-term maintenance and safety documentation are as consequential as peak arithmetic throughput. Graphics-optimized performance does not automatically translate into equivalent neural-network inference performance, particularly for memory-bound or operator-specific workloads.
How the distributed safety approach is intended to work
FuSa is shorthand for functional safety: engineering measures intended to detect or control faults that could contribute to hazardous behavior. ISO 26262 assigns Automotive Safety Integrity Levels (ASILs) from A to D, with higher levels generally imposing more stringent requirements. ASIL-B is meaningful, but it is below ASIL-C and ASIL-D and does not automatically suit every safety-related vehicle function.
Imagination’s Distributed Safety Mechanisms use the parallel structure of a GPU. In the company’s description, execution threads are paired using a technique it calls “Safety Pairs,” and safety checks are inserted during otherwise unused or underused processing time. The goal is to detect certain processing faults without duplicating an entire GPU core or rerunning complete workloads. Imagination’s description of the mechanism
Imagination contrasted the approach with dual-core lockstep, which duplicates hardware, and workload repetition, which reruns work for checking. It estimated about 10% additional area and near-zero GPU-performance impact for its distributed approach, versus roughly 100% area increase for lockstep and about a 50% effective-performance reduction for repeated workloads. These comparisons and overhead estimates come from the vendor; they are not universal measurements for every design or independent proof that safety has no cost.
The mechanism addresses a particular part of a safety architecture: detecting relevant processing faults. It does not eliminate all safety overhead or replace measures such as fault containment, monitoring, software verification, system redundancy where needed, or a complete safety case.
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- Equipped with high-performance RK3576 processor, integrated with quad-core Cortex-A72 and quad-core Cortex-A53, providing strong performance and high energy efficiency
- Equipped with 6 TOPS computing power, easy to convert a variety of neural network models based on TensorFlow, MXNet, PyTorch, and Caffe frameworks.
- Supports 4K@120fps (H.265/HEVC, VP9, AVS2, AV1), 4K@60fps (H.264/AVC) decoding and 4K@60fps (H.265/HEVC, H.264/AVC) encoding, easy to deal with HD video tasks
- Different types of traffic can be distributed to different network interfaces: one for external Internet connection and another for internal LAN, which improves security and management flexibility
What the later ASIL-B certification established
On November 11, 2024, Imagination announced that SGS-TÜV Saar had independently certified the IMG DXS-8-256 configuration as ISO 26262 ASIL-B compliant. The announcement said the configuration met the greater-than-90% diagnostic-coverage expectation for single-point faults relevant to the component assessment. Imagination said it planned to submit additional DXS configurations for independent certification. Certification announcement
The scope is important: the specifically named certified item is DXS-8-256. Do not infer from that announcement that every DXS core count or configuration has the same certification. Product pages may describe a family as certified or certifiable, but the customer should confirm the evidence and scope applicable to the exact configuration being considered.
Nor does a component-level certification certify the customer’s entire SoC, electronic control unit, ADAS function or vehicle. The integrator remains responsible for selecting the right configuration, integrating it correctly, validating the final system and establishing the vehicle-level safety case. A function targeting ASIL-D may require additional mechanisms, independent monitors, safety islands or system-level redundancy beyond an ASIL-B GPU component.
Scaling, virtualization and integration
DXS is offered in single-, dual-, triple- and quad-core arrangements. Imagination also describes a low-bandwidth inter-core bus, isolation features and a design intended to accommodate chiplet architectures. Those characteristics may support consolidation of graphics and compute workloads, but “chiplet-suitable” is not proof of a completed customer implementation: packaging, die-to-die interfaces, latency, thermal design and the SoC architecture all affect feasibility.
Imagination lists hardware virtualization for up to eight isolated operating-system environments, with memory isolation. This can help separate workloads—for example, cockpit functions and other compute tasks—on shared hardware. Hardware isolation does not by itself verify software partitioning, scheduling, interrupts, memory protection or failure containment. Those remain integration and verification concerns. The product page also lists features such as Dual-rate FP16, Fragment Shading Rate, Dual-lockstep RISC-V firmware and ASTC HDR support. Current DXS feature overview
What a prospective licensee should verify
DXS may interest automotive SoC designers, Tier 1 suppliers and OEM technology groups seeking scalable GPU IP for cockpit and ADAS workloads, especially where graphics and compute need to coexist with an ASIL-B-oriented safety architecture. It is less directly relevant to consumers looking for a purchasable GPU, or to teams that need a turnkey module rather than IP to integrate.
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1Fix the driver behind crashes, sound loss and screen glitches2Clear out junk files and repair common Windows errors3Scan for outdated or missing drivers - takes under a minute- Exact configuration and safety scope: Which DXS variant is proposed, and is it independently certified or described as certifiable? What safety artifacts are supplied?
- Workload evidence: What results exist for the intended graphics, sensor-processing or inference workload, at what clock, precision, memory bandwidth and power envelope?
- Software package: Which drivers, APIs, compilers, libraries and debugging tools are included and maintained? What support is available for the selected OS or RTOS?
- Implementation constraints: What area, power, clock and memory requirements apply on the intended process node and SoC design?
- System safety: How do virtualization, freedom from interference, monitoring and fault containment fit the customer’s complete ISO 26262 safety case?
- Commercial terms: What licensing, royalty, maintenance and customization arrangements apply? Imagination does not publish standard DXS pricing in the cited product material.
Public information does not provide a full independent competitive benchmark suite, customer-specific silicon results or complete system power data. Comparisons with other GPU or NPU products require matched workloads, precision, clocks, software, memory systems and power conditions; the announcement’s 24-TOPS figure alone is not enough to establish an AI-performance ranking.
DXS is one part of Imagination’s automotive portfolio, rather than the company’s only option. Its portfolio also includes BXS and newer E-Series positioning. Which family fits depends on the required workload, safety scope and implementation—not simply which has the largest headline number. Imagination automotive portfolio
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