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RISC-V is an open processor instruction-set architecture (ISA) that could give automakers more choice in the chips behind vehicle control, driver assistance and digital cockpits. It is not a chip or a ready-made automotive system: vendors must turn the ISA into processors, qualify them for vehicle use and support them with software. Infineon announced an automotive RISC-V microcontroller family in March 2025, while European projects are developing a broader automotive platform. Those are signs of growing adoption, not proof of widespread production-car deployment.
What RISC-V means for cars
An ISA defines the instructions a processor can execute and the rules software uses to communicate with it. RISC-V International standardizes the RISC-V ISA; it does not sell processor cores. IP vendors and chip designers create implementations that follow the standard, and semiconductor companies can use those implementations or develop their own.
RISC-V’s design is modular. A processor can use standard extensions and, where appropriate, additional workload-specific extensions. That flexibility can let a chip designer tailor processors for different combinations of real-time control, power consumption, performance, artificial intelligence (AI), safety and security. The ISA itself does not guarantee those outcomes: they depend on the implementation and the surrounding hardware and software.
Where RISC-V could fit in a vehicle
A vehicle does not need one kind of processor for every task. RISC-V could be used across several kinds of electronics, with different implementations suited to each workload.
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Real-time control and zonal electronics
Microcontrollers in braking, body electronics, power systems and battery management handle control tasks that may need predictable timing. Zonal controllers collect and manage functions for parts of the vehicle. RISC-V could serve these roles if a vendor’s implementation meets the relevant real-time, safety and reliability requirements.
ADAS and automated driving
Advanced driver-assistance systems (ADAS) and automated-driving systems need processors and accelerators for tasks such as perception, planning and inference. RISC-V could be part of this high-performance computing mix. The ISA alone does not supply the accelerators, safety case or performance needed for any particular driving feature.
Central compute and digital cockpits
Software-defined vehicles (SDVs) use software to deliver and update an expanding set of vehicle functions. Central computers and cockpit systems may combine different kinds of processing for infotainment, voice control, personalization and AI. A shared RISC-V direction across multiple chips could, in principle, reduce the number of instruction-set architectures a software organization must support.
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Safety and security functions
Vendors could also use RISC-V processors in safety islands, security monitors or isolated and redundant processing paths. Those functions must be designed and validated as part of the complete chip and vehicle system; choosing an ISA does not establish that a component is safe or secure.
Why automakers and suppliers are exploring it
For an automaker or Tier 1 supplier, the potential appeal is control and choice. Teams can select among processor families, open-source implementations or bespoke designs, and can tailor a processor to a particular workload. A common ISA direction across chips could also make software and tools more reusable than a patchwork of unrelated instruction sets.
RISC-V International presents roadmap control, software portability and multiple supplier options as ecosystem advantages. In practice, those benefits depend on available implementations, compatible software and tools, and suppliers’ ability to support automotive lifecycles. Modularity may enable workload-specific tuning, but it does not by itself prove lower chip costs, faster development or easier certification.
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- The ESP32-C3 SUPERMINI is positioned as a high-performance, low-power, cost-effective IoT mini development board, suitable for low-power IoT applications and wireless wearable applications
- It is equipped with a rich set of interfaces, including 11 digital I/Os that can be used as PWM pins and 4 analog I/Os that can be used as ADC pins.
- It supports four serial interfaces, including UART, I2C, and SPI.
- The ESP32-C3 features a 32-bit RISC-V CPU, including an FPU (Floating Point Unit) capable of 32-bit single-precision
- Package: 2PCS ESP32-C3 MINI Development Board ESP32 SuperMini ESP32 C3 WiFi Module
What adoption evidence shows
Infineon’s announced automotive MCU family
On 6 March 2025, Infineon Technologies AG announced plans to launch an automotive RISC-V microcontroller family “within the coming years.” The company said: “Microcontrollers based on RISC-V help to meet these complex requirements, reducing vehicle complexity and time to market at the same time.” That is Infineon’s description of its plans and expected benefits, not independent validation of cost or development-time savings. The announcement establishes a roadmap, not a confirmed production-car launch date.
Infineon’s 6 March 2025 announcement
European Rigoletto project
The European Commission’s project record, dated 19 May 2025, describes Rigoletto as an effort targeting a RISC-V automotive hardware platform. Its scope includes processor cores, accelerators, interconnects, memory hierarchy and peripheral subsystems. The Commission’s digital-vehicle ecosystem policy also describes a pre-competitive RISC-V platform effort with AI computing capacity. These descriptions show the direction and intended scope of European work; they do not establish delivered vehicle volume.
European Commission: Rigoletto RISC-V Automotive Hardware Platform
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- ESP32-C6 WiFi 6 microcontroller development board adopts ESP32-C6-WROOM-1-N8 module, which is equipped with RISC-V 32-bit single-core processor, up to 160MHz main frequency, built-in 8MB Flash
- Integrates WiFi 6, Bluetooth 5 and and IEEE 802.15.4 (Zigbee 3.0 and Thread) wireless communication, with superior RF performance
- Integrates rich peripherals including SPI, UART, I2C, I2S, LED PWM, SDIO and other interfaces, compatible with the pinout of ESP32-C6-DevKitC-1-N8 development board, more convenient to use and expand a variety of peripheral modules
- Onboard CH343 and CH334 USB HUB chips, supports USB and UART development at the same time via a USB-C port
- Comes with online examples and tutorials for ESP-IDF development environment
Industry coordination and market forecasts
RISC-V International’s 2025 annual report describes accelerating automotive activity involving silicon, software and deployments. Its Automotive Hub includes ecosystem sessions on safety, security and automotive computing, and its supply-chain material says the Automotive Special Interest Group and Functional Safety Special Interest Group are aligning requirements such as long lifecycles, functional safety and real-time behavior. These are signs of ecosystem development, not a verified measure of how many cars use RISC-V.
RISC-V International also cited an Omdia forecast that AI and automotive applications could help RISC-V approach nearly 25% of the processor market by 2030. This is a projection cited by RISC-V International in its 2024 year-in-review blog—not a current market share, an automotive-only figure or a count of production vehicles.
RISC-V International’s 2024 year-in-review
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What still has to be solved before automotive use
A RISC-V ISA is only one layer in a vehicle electronics program. Each chip and its software need evidence suited to their intended role, vehicle program and safety requirements.
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- Ample PSRAM Storage – The development board offers 8MB PSRAM, providing substantial extra memory for handling more complex tasks, large data buffers, and advanced processing.
- Enhanced Multi-Tasking Capability – With the additional 8MB PSRAM, the ESP32-C5-WIFI6-KIT can efficiently manage multiple protocol stacks simultaneously, ensuring smooth operation in multi-tasking IoT environments.
- Support for Medium-Load Applications – The 8MB PSRAM allows the ESP32-C5 to handle medium-load applications more effectively, making it ideal for scenarios requiring real-time data processing or continuous communication.
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- Functional safety: The processor implementation needs verification, safety analysis and appropriate evidence for its intended use. Selecting RISC-V does not make a design certified.
- Cybersecurity: Security engineering must address the implementation, software, interfaces and system integration.
- Deterministic behavior: Control applications need timing that can be analyzed and validated under their operating conditions.
- Software and tools: Operating systems, debugging, toolchains and automotive software stacks must support the specific implementation. Compatibility and maturity can vary by vendor and workload.
- Lifecycle and supply: Automotive programs need components and support over long product lifecycles, along with credible sourcing and change-management plans.
- Vehicle-level validation: A chip must be manufactured, integrated and validated in the vehicle system. Public project plans and architecture descriptions are not substitutes for this evidence.
RISC-V versus Arm: how to compare them
There is no universal winner for automotive processors. Arm and RISC-V are different architecture choices, but the decision for a vehicle program turns on specific implementations and the evidence and ecosystem available for the intended job. A practical comparison should assess:
- Licensing and roadmap control: What control does the supplier need over processor selection, implementation and future changes?
- Qualified automotive IP: Which suitable cores and supporting components are available for the program’s target workload and schedule?
- Safety and security evidence: What documentation, engineering support and certification-related material does the vendor provide?
- Software ecosystem: Are the required operating systems, AUTOSAR components, tools and debugging workflows supported?
- Real-time needs: Can the chosen implementation meet and demonstrate the timing requirements?
- Workload flexibility: Does the design benefit from AI, vector or custom extensions, and can the team support them?
- Sourcing and lifecycle: Are there suitable supplier options and a long-term product-support plan?
- Total engineering cost: Consider software migration, verification, tool qualification, integration and validation—not just processor licensing or chip price.
RISC-V’s openness and extensibility can be attractive when roadmap control or workload-specific design matters. Those characteristics do not establish that RISC-V is safer, cheaper or more mature than Arm for a particular vehicle program. The answer depends on the workload, safety level, software stack and schedule.
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